Openocd on Omega2
I want to build and install openocd on my Omega2+. I have installed openocd using package manager but it didn't help me because it has only jtag support. I want to use swd option (programming using bitbang). So I decided to build openocd myself. I have searched on internet and found https://review.openocd.org/c/openocd/+/6023 so I am almost sure that this is possible. I could program my Atmel chip using Raspberry pi 4 (https://learn.adafruit.com/programming-microcontrollers-using-openocd-on-raspberry-pi) but I couldn't build openocd in the same way on my omega2 board. There are some library dependencies and I couldn't resolve them. I am adding some missing files myself according to the summary of ./configure && make instructions and installing necessary packages manually but I am not sure I could install openocd in this way.
Thanks for support!!
@yalpay38 OpenOcd is available in the build system so why not use that?
@crispyoz because I have two pins available and I need to use swd for programming. Running "openocd -f interface/dummy.cfg -f target/at91samdXX.cfg" command gives me result:
Open On-Chip Debugger 0.10.0
Licensed under GNU GPL v2
For bug reports, read
Info : only one transport option; autoselect 'jtag'
adapter speed: 400 kHz
cortex_m reset_config sysresetreq
Info : clock speed 400 kHz
Info : TAP at91samd.cpu does not have IDCODE
Info : TAP auto0.tap does not have IDCODE
I need to add configuration file manually where I can edit the pin numbers and select other options. Here is a sample:
# # Config for using Onion Omega2's expansion header # # This is best used with a fast enough buffer but also # is suitable for direct connection if the target voltage # matches Omega2's 3.3V and the cable is short enough. # # Do not forget the GND connection, pin 6 of the expansion header. # adapter driver mt7688gpio mt7688gpio_peripheral_base 0x10000600 # Transition delay calculation: SPEED_COEFF/khz - SPEED_OFFSET # These depend on system clock, calibrated for stock 700MHz # mt7688gpio_speed SPEED_COEFF SPEED_OFFSET mt7688gpio_speed_coeffs 113714 28 # Each of the JTAG lines need a gpio number set: tck tms tdi tdo # Header pin numbers: 0 1 7 8 mt7688gpio_jtag_nums 0 1 7 8 # Each of the SWD lines need a gpio number set: swclk swdio # Header pin numbers: 0 1 mt7688gpio_swd_nums 0 1 # If you define trst or srst, use appropriate reset_config # Header pin numbers: TRST - 9, SRST - 6 # mt7688gpio_trst_num 9 # reset_config trst_only # mt7688gpio_srst_num 6 # reset_config srst_only srst_push_pull # or if you have both connected, # reset_config trst_and_srst srst_push_pull
@yalpay38 Take a look at this thread where we helped a user modify the lora gateway package.
You can see how you can use a patch file to make some changes to an existing package, or how you can fork the exiting package and include that in your build.
Hi @crispyoz , I didn't need to modify the package, because I misunderstood the error at the beginning. Now I solved the problem after long hours. I managed to program using swd mode, it was actually available but the error message was misleading for me. Thanks a lot though