Thanks @crispyoz and @Lazar-Demin for the hints!
I found the lines that makes GPIO44 an output in uboot in lib_mips/board.c:3012:
//gpio44 output gpio_ctrl_1 bit3=1
val=RALINK_REG(RT2880_REG_PIODIR+0x04);
val|=1<<12;
RALINK_REG(RT2880_REG_PIODIR+0x04)=val;
(RT2880_REG_PIODIR+0x04 is MT7688's GPIO_CTRL_1 at 0x10000604)
Interestingly this was in the initial commit in 2016 by @youlian-troyanov, so GPIO44 being used by uboot seems to be something predating Omega2 related changes and is hard-coded for any lib_mips based setups.
As in many cases there will be the WLAN LED connected there, it makes sense also using it for some signalling in early boot stages.
And in fact, this is done in led_on() and led_off(), curiously using literal hex addresses for GPIO_DSET_1/GPIO_DSET_1, see lib_mips/board.c:3047ff:
void led_on( void )
{
//gpio44 gpio_dclr_1 644 clear bit12
RALINK_REG(0xb0000644)=1<<12;
}
void led_off( void )
{
//gpio44 gpio_dset_1 634 set bit12
RALINK_REG(0xb0000634)=1<<12;
}
I would be much more nice to have:
//gpio44 gpio_dclr_1 644 clear bit12
RALINK_REG(RT2880_REG_PIORESET+0x04)=1<<12;
and
//gpio44 gpio_dset_1 634 set bit12
RALINK_REG(RT2880_REG_PIOSET+0x04)=1<<12;
Another curious thing: Why is the address used in uboot 0xb0000000 based (RALINK_SYSCTL_BASE), while in the datasheet the addresses are 0x10000000 based? Probably because address decoding is 29 bits only, so the I/O block is mirrored at every 0x20000000?
Anyway, as GPIO44 is one of the few pins that allow pullups or pulldowns at startup and do not have another special function, I'll probably patch my uboot to leave it alone for my Omega2S devices.
What I still do not understand is how I could not notice GPIO44 flapping around in all the circuits I've done with the assumption it would not
